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1 igned for planar, rigid substrates (e.g., Si wafers).
2 on and collection of hundreds of sections on wafer.
3 ectors, and bipolar transistors, on the same wafer.
4  as to have crack-free and low-bow (<50 mum) wafer.
5  nm nanowires distant by 28 nm across 6-inch wafer.
6 um is based on a five-core heterogeneous QCL wafer.
7 s were utilized, a glass slide and a silicon wafer.
8 own on semiconducting single crystal silicon wafer.
9 id molecules from a fingerprint on a silicon wafer.
10 thin film across a two-inch c-plane sapphire wafer.
11 nogaps in a metal film over an entire 4-inch wafer.
12 rs) properties is fabricated on a 6" silicon wafer.
13  than measured on a single crystal reference wafer.
14 A, and pack 150,000 such devices on a 4-inch wafer.
15 etched arrays of pyramidal pits in a silicon wafer.
16 ble fabrication of microcolumns in a silicon wafer.
17 arrange a 3 m long column on a 4 in. silicon wafer.
18 roduce over one million robots per four-inch wafer.
19 er due to higher mismatch with the substrate wafer.
20  diamond coated tip on a P-type or N-type Si wafers.
21 on is lost as kerf during slicing to produce wafers.
22 with advanced microelectronic fabrication on wafers.
23 Ox1 and H2 O2 (aq) as Ox2 with Si powder and wafers.
24 deviation of less than 7 mum over two 2-inch wafers.
25 erved in electrochemical measurements on MCT wafers.
26 d for cadmium zinc telluride (CdZnTe or CZT) wafers.
27 ion from initiators immobilized on Si/SiO(2) wafers.
28 sential process to manufacture semiconductor wafers.
29 ce plane curvature (LPC) for 150 mm diameter wafers.
30 oncentration throughout the depth of the GaN wafers.
31 he growth of random SWNT networks on silicon wafers.
32 l rigid substrates such as glass and silicon wafers.
33 sing post treatment of off-the-shelf silicon wafers.
34 ating an oxygen activity gradient across the wafer, a continuous valence state library is established
35 und that, with a Si(100)-hydrogen terminated wafer, a Si-ethoxy (Si-OC2H5) surface intermediate forms
36 2 NPA is synthesized in-situ on a 4-inch MHP wafer, able to produce thousands of gas sensing units in
37 nd 4.74 nm are achieved, respectively on MCT wafers after CMP.
38 , and asymmetric Ag-Au NPs-decorated silicon wafers (Ag-Au NPs@Si)).
39  of 15 days, the group that received the TMZ wafer alone had a median survival of 19 days, and the gr
40 active ion etching of a silicon-on-insulator wafer and bonded to a polydimethylsiloxane microfluidic
41 ations that exceed the scope of conventional wafer and circuit board technologies due to their unique
42 cluding compatibility with MEMS processes on wafer and easy replication.
43 ator hosts were fabricated on a fused-silica wafer and filled with 3,3'-Diethyloxacarbocyanine iodide
44 tice PC Bragg laser fabricated from the same wafer and find that their performances are comparable.
45 s were prepared through spin coating onto Si wafers and consisted of combinations of polystyrene (PS)
46 ules) on various substrates (such as silicon wafers and glass) by solution-processing is reported.
47 ubstrates, in particular crystalline silicon wafers and holey carbon films.
48 ic compositions, were synthesized on silicon wafers and on catalytic supports by a ligand-free, solid
49 ase study, the extract was incorporated into wafers and the changes on the nutritional profile, free
50 films were covalently immobilized on silicon wafers and were treated with protein conjugated on FSNPs
51 gle chip, have channels on both sides of the wafer, and at the same time minimize debris generation a
52  factors, including polymer spheres, silicon wafers, and fibers.
53 -abrasive lapping is used to machine the MCT wafers, and the lapping solution is deionized water.
54 embled in microwells on a pyrolytic graphite wafer are housed in dual microfluidic chambers.
55                    Finally, the polished MCT wafers are cleaned and dried by deionized water and comp
56  cleaved from commercially available silicon wafers are low-cost monolithic monocrystalline materials
57                            Secondly, the MCT wafers are polished using the developed CMP slurry.
58  silicon nanocrystals (Cl-SiNCs) and silicon wafers as well as molecular chlorosilanes, were explored
59 les (NPs), obtained via anodic etching of Si wafers, as a basis for undecylenic acid (UDA)- or acryli
60 he device is first fabricated on a planar Si wafer at the microscale and then transferred to transpar
61 ed scratching is carried out on silicon (Si) wafers at nanoscale depths of cut to investigate the fun
62 raphene layers on hBN flakes and on sapphire wafers at substrate growth temperatures of 1400 degrees
63                                          The wafer-based first-generation photovoltaic devices have b
64 ed light and multiple reflections within the wafer-based IRE.
65  for the further development of low-cost, Si wafer-based IREs for electrochemical ATR-SEIRAS applicat
66 ace recombination and Auger recombination in wafer-based nanostructured silicon solar cells.
67 rend in increasing the cost-effectiveness of wafer-based solar cells.
68 jected onto the rim of the TiO2-coated glass wafer, before the entire wafer is exposed to UV irradiat
69 light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent
70 with semiconductors by using methods such as wafer bonding or molecular beam epitaxy, cost-effective
71 tion advanced lithography or well-controlled wafer bonding techniques to define their critical dimens
72 g compared to the pulsed laser deposition or wafer bonding used in the fabrication of NRPS devices.
73  CdTe by constructing grain boundaries using wafer bonding.
74 use changes in the nutritional components of wafers but added colorant and antioxidant properties.
75 photocurrent density of a commercial silicon wafer by photoelectrochemical measurements and the highe
76 ushes were grown from the surface of silicon wafers by atom-transfer radical polymerization.
77    These results demonstrate how virgin NPSi wafer can serve as Cu(2+) sensor.
78 cal etching of highly B-doped p-type silicon wafers can be prepared with tubular pores imbedded in a
79 , we demonstrate that NiPd-NG-Si (Si=silicon wafer) can function as a catalyst and show maximum NiPd
80 achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.
81      A photocathode consisting of a n(+)p-Si wafer coated with ultrathin Al(2)O(3) and AgP(2) NCs ach
82 llenges is the large contribution of silicon wafer cost to the overall module cost.
83                    TMZ delivered via polymer wafer could be used as a complementary treatment with or
84  (EDTA) in DMSO exerts superior control over wafer coverage and film thickness, and the results demon
85  Here we demonstrate that a piece of silicon wafer cut by a dicing machine or cleaved manually can be
86                       Thin, micromachined Si wafers, designed as internal reflection elements (IREs)
87  were either untreated or treated with blank wafer died within 11 days while the median survival for
88 , Deltad/d, was highest for the lowest doped wafer due to higher mismatch with the substrate wafer.
89 -yield growth of thousands of bicrystals per wafer, each containing a grain boundary with a unique <1
90             Samples collected at two silicon wafer fabrication facilities ranged from 10.0 to 9120 pp
91                                   The Si-tip wafers feature a rectangular array of nanometer sized Si
92 ilms on a lithographically patterned silicon wafer, followed by complete removal of the silicon subst
93  epoxy are discussed to preserve the silicon wafer for future use.
94 nstrate the potential of this newly designed wafer for treating GBM.
95 ons, ranging from the fabrication of silicon wafers for microelectronics to the determination of prot
96  collection of ultrathin sections on silicon wafers for post-embedding staining and volumetric correl
97 ring the slicing of silicon ingots into thin wafers for the fabrication of integrated-circuit chips a
98 materials are required, these include, e.g., wafers from semiconductor industry or studies on space w
99                  In addition to showing full wafer gallium arsenide thin film transfer onto both rigi
100  nanoparticles (H-SiNPs), and planar Si(111) wafers (H-Si(111)), we demonstrate that among different
101       The group that received the BCNU alone wafer had a median survival of 15 days, the group that r
102 ays, and the group treated with the BCNU-TMZ wafer had a median survival of 28 days with 25% of the a
103 al germanium (Ge) thin films on silicon (Si) wafers has been achieved over large areas with aqueous f
104 lished that the CMC/ALG binary blend polymer wafers have the potential to improve the sublingual deli
105  precisely desired locations over the entire wafer in a single chemical vapor deposition (VCD) proces
106 l microfluidics using water on doped silicon wafers in air, with only +/-2.5 volts of driving voltage
107 tch-stop layer to replace the use of carrier wafers in Deep Reactive Ion Etching (DRIE).
108  of semi-insulating Fe-doped InP crystalline wafers in the 2-700 cm(-1) (0.06-21 THz) spectral region
109                 The use of a crystal (the Si wafer) in a disposable manner enables simultaneous prepa
110 ing dislocations in the top 6 microns of the wafer increase after epitaxial layer growth.
111 l layer growth, the LPC variation across the wafer increases by a factor of 2, irrespective of doping
112 tocurrent response of a commercial p-type Si wafer, indicating potential use in photovoltaic cells.
113 he passivating process during the CMP of CZT wafers, indicating by the lowest passivation current den
114 tion enhancement with the benefit of thinner wafer induced open circuit voltage increase.
115 he organic (silane layer)-inorganic (silicon wafer) interface.
116                            The 500 mum thick wafer IREs with groove angles of 35 degrees are signific
117 es on demineralized and deproteinized dentin wafer is a powerful tool to determine the functional rol
118      The density of surface states of the Si wafer is changed by introducing different densities of d
119 rived from an anisotropically etched silicon wafer is discussed.
120 e TiO2-coated glass wafer, before the entire wafer is exposed to UV irradiation.
121                 Raman maps show that the 2'' wafer is relaxed and uniform.
122  non-birefringent thermal oxide on a silicon wafer; it was followed by lithographic fabrication of a
123 e surface mount chip components, such as the wafer level chip scale packages, chip resistors, and lig
124 ess of rGO based field-effect transistors on wafer level.
125  represents a versatile approach for in-situ wafer-level fabrication of high-performance micro/nano g
126        We present here a strategy of in-situ wafer-level fabrication of the high-performance micro/na
127             The microsystem fabrication on a wafer-level is based on a polyimide substrate and includ
128 micro-objective lens module, composed of two wafer-level microlens arrays, is proposed to generate a
129 By introducing colloidal crystal template, a wafer-level ordered homogenous SnO2 NPA is synthesized i
130 H-SiCOI) mechanical resonators fabricated at wafer-level, and reports on ultra-high quality-factors (
131 r (SOI) substrates can be integrated using a wafer-level-packaging process and achieve higher power d
132 ference rejection scheme are integrated on a wafer-level.
133 the analysis are co-entrapped on paper in a "wafer"-like bilayer film of polyelectrolytes (Poly (ally
134 clude liposomal and polymeric nanoparticles, wafers, microchips, microparticle-based nanoplatforms an
135 de (Si3N4)/silicon oxide on a p-type silicon wafer, namely electrolyte-oxide-nitride-oxide-Si (EONOS)
136                Implantation of biodegradable wafers near the brain surgery site to deliver anti-cance
137          The scratching is conducted on a Si wafer of 150 mm diameter with an ultraprecision grinder
138 to investigate the fundamental mechanisms in wafering of solar cells.
139                  HIV gp140 protein loaded in wafers of the optimal composition could be stored and tr
140      By HVPE method, overgrowth of thick GaN wafer over 200 mum has been achieved free of residual st
141 ation directly on conventional semiconductor wafer platforms and, therefore, promises to allow the in
142 edestal sensor array fabricated over through-wafer pores compatible with vertical flow fields to incr
143          Methods of surface treatment of the wafer prior to casting and PDMS casting of the epoxy are
144            A high-yield, silicone-on-silicon wafer process is developed to ensure reproducible charac
145 nd this behavior is observed across multiple wafers produced in different growth chambers.
146 anufacturing process for solar grade silicon wafer production, this approach greatly reduces the capi
147 nd systems based upon single-crystal silicon wafers provide convenient, straightforward purification.
148 eutic options includes placing biodegradable wafers releasing BCNU (Gliadel(R)) into the tumor bed at
149 hnology has had clinically, we have prepared wafers releasing Temozolomide (TMZ), an anticancer drug
150  of photolithography and requires no silicon wafer, replica molding, and plasma bonding like microflu
151  droplet generators onto a single 4" Silicon wafer, representing a 100% increase in the total number
152  material systems for commercially available wafers restricts the range of materials that can be grow
153 diamond into high-quality graphene layers on wafer scale (4 inch in diameter) using a rapid thermal a
154                                              Wafer scale (cm(2)) arrays and networks of nanochannels
155 o tri-gate transistors and photodetectors at wafer scale (cm(2)) without postgrowth transfer or align
156  facile and reproducible method of producing wafer scale atomically thin MoS2 layers has been develop
157 pes and tunable compositions are realized on wafer scale for metallic glasses including the marginal
158 mensional (2D) MoS2 have been fabricated and wafer scale growth of 2D MoS2 has been realized, the fun
159 tercalation method, which is compatible with wafer scale growth of heterostructures.
160         We use electron beam lithography and wafer scale processes to create silicon nanoscale pillar
161                       The realization of the wafer scale production of single crystalline graphene fi
162  to fabricate well-ordered patterns over the wafer scale with feature sizes below the resolution of c
163 rystalline VO2 thin films have been grown on wafer scale, exhibiting more than four orders of magnitu
164 et up to be manufacturable and testable on a wafer scale, requiring no cleaved facets or special mirr
165 on of homogenous few layer MoS2 films at the wafer scale, resulting from the novel chelant-in-solutio
166 sity, epi-ready Ge/Si virtual substrate on a wafer scale, using a highly scalable process.
167 ingle-digit nanometre dimensions over 200 mm wafer scale.
168 ed) few-layer graphene can been grown at the wafer scale.
169 -up and top-down fabrication techniques over wafer-scale areas.
170           The high-throughput production and wafer-scale automatable transfer will facilitate the int
171  these films we successfully demonstrate the wafer-scale batch fabrication of high-performance monola
172 icroIDE) electrode-arrays were fabricated on wafer-scale by combining nanoimprint and photolithograph
173           With the breakthrough in growth of wafer-scale continuous 2H-MoTe(2) monolayers on device c
174          Here, layer-by-layer growth of 2 in wafer-scale continuous monolayer 2H-MoTe(2) films on ine
175 ique will lead the field toward synthesis of wafer-scale crystalline perovskites, necessary for the f
176                 In combination with improved wafer-scale CVD growth of 2D materials, this approach pr
177                                              Wafer-scale deposition of mono to few layer TMD films ha
178 stals have been demonstrated; however, their wafer-scale deposition remains a challenge.
179                                       Toward wafer-scale epitaxial and grain boundary-free film is gr
180                                              Wafer-scale fabrication of complex nanofluidic systems w
181         These findings are promising towards wafer-scale fabrication of graphene photodetectors appro
182                                              Wafer-scale fabrication of high-performance uniform orga
183                     Here, we demonstrate the wafer-scale fabrication of highly reflective and conduct
184               In this way, the foundry-based wafer-scale fabrication technology for silicon photonics
185 angle color reflection, and is applicable to wafer-scale fabrication using conventional thin film tec
186   The flexible nanofluidic structure design, wafer-scale fabrication, single-digit nanometre channels
187 port the preparation of high-mobility 4-inch wafer-scale films of monolayer molybdenum disulphide (Mo
188 bstrates (Ni(C)/(B, N)-source/Ni) in vacuum, wafer-scale graphene/h-BN films can be directly formed o
189  realization in commercial devices demands a wafer-scale growth approach for high-quality transition
190                                              Wafer-scale heterostructures consisting of single-layer/
191 ser scribing fabrication method to integrate wafer-scale high-performance graphene-based in-plane tra
192 imensional (2D) porphyrin polymer films with wafer-scale homogeneity in the ultimate limit of monolay
193                  TriSilix can be produced at wafer-scale in a standard laboratory (37 chips of 10 x 1
194 n this work, we propose a novel approach for wafer-scale integration of 2D materials on CMOS photonic
195 the laser scribed graphene could be used for wafer-scale integration of a variety of graphene-based e
196 ance field-effect transistor (FET) arrays in wafer-scale is demonstrated, and the FETs show remarkabl
197 e laser and has potential for cost-effective wafer-scale manufacturing.
198                         These devices employ wafer-scale mixed-dimensional van der Waals heterojuncti
199 ghput growth, completed in 12 min, of 6-inch wafer-scale monolayer MoS(2) and WS(2) is reported, whic
200 eratures for fabrication of high-performance wafer-scale p-type field-effect transistors.
201             This DNA nanolithography enables wafer-scale patterning of two-dimensional electronic mat
202               We developed OECT devices in a wafer-scale process and used them as electrophysiologica
203                                We describe a wafer-scale process for manufacturing strongly adhering
204 method offers great commercial potential for wafer-scale processes.
205 tion techniques is an exciting route towards wafer-scale quantum technologies.
206             Here we report the generation of wafer-scale semiconductor films with a very high level o
207          This reliable approach to producing wafer-scale single-crystal hBN paves the way to future 2
208                                              Wafer-scale single-crystalline graphene monolayers are h
209 ay also prove effective for the synthesis of wafer-scale single-crystalline monolayers of other two-d
210 t photovoltaics use high-purity, large-area, wafer-scale single-crystalline semiconductors grown by s
211 e the application of conjugated polymers for wafer-scale sophisticated electronics.
212 ut external heating, are fabricated on 4 in. wafer-scale substrates.
213 a technique for depositing and patterning of wafer-scale two-dimensional metal chalcogenide compounds
214 n film depositions, and is of unprecedented (wafer-scale) extent.
215 rarily structured substrates and can produce wafer-scale, diffusive, angle-independent, and flexible
216 ly fabricate n-type conjugated polymers with wafer-scale, high uniformity, low contact resistance, an
217  electronics and circuits strongly relies on wafer-scale, selective growth of quality 2D TMDs.
218      Herein, the first demonstration of 4 in wafer-scale, uniform, and high-performance n-type polyme
219 search efforts and it can now be produced in wafer-scale.
220 andom nanostructures in amorphous silicon at wafer scales that achieved over 160% light absorption en
221    The LPC component has higher influence on wafer shape change, which can reduce device yields.
222 inally, we show that compacting HKUST-1 into wafer shapes partially collapses the framework, decreasi
223  mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit compl
224  for both the n-type emitter and p-type bulk wafer Si of an industrially produced aluminum back surfa
225  calculated in the n-type emitter and p-type wafer Si with the results also being consistent with lit
226  gold-capped nanopillars, which showed an in-wafer signal variation of only 11.7%.
227 dvantage of our fabrication method, a 6 inch wafer size heterogeneous surface was prepared.
228        Here, we demonstrate the synthesis of wafer-size atom-thin TMD films with an ultra-high-densit
229 xpensive procedure for epitaxial lift-off of wafer-size flexible and transparent foils of single-crys
230                                              Wafer-sized single-crystalline Cu (100) surface can be r
231 thylene glycol based cutting fluid during Si wafer slicing in semiconductor fabrication.
232 rated a relatively low cost approach to turn wafer slicing wastes into much higher value-added materi
233 parameters for active layers in silicon (Si) wafer solar cells are determined from free carrier optic
234 t-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the co
235 g in a transmission geometry: semiconductors wafers, specimens on opaque and birefringent substrates,
236 sphorus nanowires (>1 mm) selectively onto a wafer substrate from red phosphorus powder and a thin fi
237 ur deposition method is scalable to a 100 mm wafer substrate, with around 50% of the wafer surface co
238 erfections at macroscopic scales across full wafer substrates.
239 peratures we observe etching of the sapphire wafer surface by the flux from the atomic carbon source,
240 0 mm wafer substrate, with around 50% of the wafer surface covered by aligned crystals.
241  transforming a circuit fabricated on a flat wafer surface to an arbitrary shape without loss of perf
242  molecular weights and compositions across a wafer surface, with complex geometries and diverse featu
243 m atom beams traveling parallel to a silicon wafer surface.
244 s uniformly transferred onto 2" GaN or 4" Si wafer surfaces as a release buffer layer.
245  methacrylate) (PGMA) polymer brushes and Si wafer surfaces were activated locally using atomic force
246  is a z-cut single crystalline LiNbO(3) (LN) wafer that has strong Pockels effect, thus enabling the
247 his approach relies on processing a separate wafer that is then mechanically mounted on the 2DEG mate
248 a simple biopolymer platform of mucoadhesive wafers that enables effective sublingual delivery and pr
249            When performed on a mesoporous Si wafer, the perfluoro reagent yields a superhydrophobic s
250                         Reducing the silicon wafer thickness at a minimized efficiency loss represent
251 erly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only arou
252 thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency
253       The sensor was fabricated on a silicon wafer through photolithography to define the sensor geom
254 of cylindrical micellar brushes on a silicon wafer through seeded growth of crystallizable block copo
255  with high yield and fidelity from a SiO2/Si wafer to various non-Si based substrates, including pape
256 -doped CdTe using high-purity single crystal wafers to investigate the mechanisms that limit p-type d
257 ng nanopore membranes on insulating sapphire wafers to promote low-noise nanopore sensing.
258          We used photolithography on silicon wafers to synthesize microarrays (Intel arrays) that con
259 ividual carbon nanotubes (CNTs) on a silicon wafer using a conventional optical microscope.
260 rotrap array etched from a silica-on-silicon wafer using conventional semiconductor fabrication techn
261             First, we modified polycarbonate wafers using an electrophilic aromatic substitution reac
262 osensors were fabricated on oxidized silicon wafers using chemical vapor deposition grown carbon nano
263 lide, 330,000 peptides per assay) on silicon wafers using equipment common to semiconductor manufactu
264 r-water interface and transferred to silicon wafers using Langmuir-Schaefer deposition.
265 cks of 32 x 32 nanowire arrays across 6-inch wafer, using electron beam lithography at 100 kV and pol
266 rs of different compositions, on the same Si wafer, using only a single deposition process and a sing
267  15 um) TSVs to be fabricated on a single 4" wafer, using only conventional semiconductor fabrication
268 diamond films grown on surface-passivated Si wafers via chemical vapor deposition (CVD) and microstru
269 the same time minimize debris generation and wafer warping to enable permanent bonding of the device
270 coated glass target and carbon-coated silica wafer was characterized with atomic force microscopy.
271 devices with four-color emission on the same wafer were demonstrated.
272                                              Wafers were also made with a co-loading of TMZ and BCNU.
273                                          The wafers were composed of a series of binary polymer blend
274                                        These wafers were fabricated by complementary metal-oxide-semi
275 dies that led to Gliadel(R) the same size of wafers were formulated with TMZ.
276                                              Wafers were loaded with 50% w/w TMZ in poly(lactic acid-
277 crystals prepared from double-sided polished wafers were mounted in the setup.
278  polystyrene (PS) films supported on silicon wafers were obtained at temperatures ranging from room t
279 distortions (LD) in 4H-silicon carbide (SiC) wafers were quantified using synchrotron X-ray rocking c
280                                          All wafers were tested in vivo by treating an intracranial 9
281                                   SiO(2) /Si wafer, which exhibits highly uniform in-plane structural
282 cating the removing of oxidized films on MCT wafers, which is difficult to achieve using single H2O2
283 or is fabricated from a silicon-on-insulator wafer with a deliberate curvature to form an arch shape.
284 ative surface functionalization of a silicon wafer with carboxylated alkyltrichlorosilane has been de
285    For this purpose, we coated a round glass wafer with photocatalytically active anatase-phase TiO2
286 s obtained uniformly on the whole surface of wafers with a controlled number of graphene layers.
287                          Black silicon (bSi) wafers with a high density of high-aspect ratio nanopill
288 g the surfaces of long bulk-lifetime silicon wafers with Al(2)O(3), the recombination of the photoexc
289  other Bacillus species by incubation on bSi wafers with and without nanopillars.
290 ng the ratio between CMC and ALG resulted in wafers with different microstructure, mechanical propert
291 transferred to polished silicon or germanium wafers with electrostatically assisted high-speed centri
292                           On the other hand, wafers with high ALG content were not only mechanically
293                                              Wafers with high CMC content were highly mucoadhesive to
294                        We found that the bSi wafers with nanopillars were indeed very effective in ru
295                                 However, bSi wafers with or without nanopillars gave no killing or ru
296 lane molecules on naturally oxidized silicon wafers with reference-free total reflection X-ray fluore
297 mesoporous TiO2 films, dip-coated on silicon wafer, with controlled porosity in the range of 15 to 50
298 veral areas of SiGe-on-insulator on a single wafer, with the ability to tune the composition of each
299 d killing the growing bacterial cells, while wafers without nanopillars had no bactericidal effect.
300 growing single-crystal hBN films directly on wafers would contribute to the broad adoption of 2D laye

 
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